Silicon Labs

Wireless Clock Jitter Attenuator, Jitter Cleaner

The Silicon Labs Si538x family of wireless clock generators leverages our fourth generation DSPLL® technology to address the form factor, power, and performance requirements demanded by radio area network equipment, such as macrocells, small cells, remote radio heads (RRH), and distributed antenna systems (DAS).  
Wireless Clock Jitter Attenuator, Jitter Cleaner
The unparalleled integration found in the device reduces power and size without compromising the stringent performance and reliability demanded in wireless applications. The Si538x is the industry’s first wireless clock generator capable of replacing discrete high-performance VCXO-based clocks with a fully integrated CMOS IC solution. The family includes devices capable of generating both wireless clocks with less than 100 fs typical phase jitter and low-jitter general purpose clocks. 

  • Digital frequency synthesis eliminates external VCXO and analog loop filter components
  • Jitter performance <100fs RMS typ (12 kHZ - 20 MHz)
  • Input frequency range:
    • Differential: 10 MHz – 750 MHz 
    • LVCMOS: 10 MHz – 250 MHz
  • Cost effective oscillator
  • 1, 2, and 4 DSPLL options
  • Selectable loop bandwidth
  • Status monitoring: LOL, LOS, OOF
  • In-circuit programmable via SPI and I2C
  • Output frequency range:
    • Wireless DSPLL: 480 kHz - 2.94912 GHz
    • Any-rate DSPLL: 1 kHz - 712.5 MHz
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